PU2CLR RDA5807 Arduino Library 1.1.9
Arduino Library for RDA5807 Devices - By Ricardo Lima Caratti
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#include <Arduino.h>
#include <Wire.h>
Go to the source code of this file.
Classes | |
union | rda_reg00 |
Register 0x00. More... | |
union | rda_reg01 |
Register 0x01 - Dummy. More... | |
union | rda_reg02 |
Register 0x02 - Basic setup: RESET configuration;. More... | |
union | rda_reg03 |
Register 0x03. More... | |
union | rda_reg04 |
Register 0x04. More... | |
union | rda_reg05 |
Register 0x05. More... | |
union | rda_reg06 |
Register 0x06. More... | |
union | rda_reg07 |
Register 0x07. More... | |
union | rda_reg08 |
Register 0x08 - Direct Frequency. More... | |
union | rda_reg0a |
Register 0x0A - Device current status. More... | |
union | rda_reg0b |
Register 0x0B. More... | |
union | rda_reg0c |
Register 0x0C. More... | |
union | rda_reg0d |
Register 0x0D. More... | |
union | rda_reg0e |
Register 0x0E. More... | |
union | rda_reg0f |
Register 0x0F. More... | |
union | rds_blockb |
RDS Block B data type. More... | |
union | rds_date_time |
union | word16_to_bytes |
Converts 16 bits word to two bytes. More... | |
class | RDA5807 |
KT0915 Class. More... | |
struct | rda_reg00.refined |
struct | rda_reg01.refined |
struct | rda_reg02.refined |
struct | rda_reg03.refined |
struct | rda_reg04.refined |
struct | rda_reg05.refined |
struct | rda_reg06.refined |
struct | rda_reg07.refined |
struct | rda_reg08.refined |
struct | rda_reg0a.refined |
struct | rda_reg0b.refined |
struct | rda_reg0c.refined |
struct | rda_reg0d.refined |
struct | rda_reg0e.refined |
struct | rda_reg0f.refined |
struct | rds_blockb.group0 |
struct | rds_blockb.group2 |
struct | rds_blockb.refined |
struct | rds_date_time.refined |
struct | word16_to_bytes.refined |
Macros | |
#define | MAX_DELAY_AFTER_OSCILLATOR 100 |
#define | I2C_ADDR_DIRECT_ACCESS 0x11 |
Can be used to access a given register at a time. | |
#define | I2C_ADDR_FULL_ACCESS 0x10 |
Can be used to access a set of register at a time. | |
#define | OSCILLATOR_TYPE_CRYSTAL 0 |
Same OSCILLATOR_TYPE_PASSIVE (Legacy) | |
#define | OSCILLATOR_TYPE_PASSIVE 0 |
Passive Crystal. | |
#define | OSCILLATOR_TYPE_REFCLK 1 |
Same OSCILLATOR_TYPE_ACTIVE (Lagacy) | |
#define | OSCILLATOR_TYPE_ACTIVE 1 |
Reference clock (active crystal oscillator or signal generator) | |
#define | RLCK_NO_CALIBRATE_MODE_ON 1 |
#define | RLCK_NO_CALIBRATE_MODE_OFF 0 |
#define | CLOCK_32K 0b000 |
32.768kHz | |
#define | CLOCK_12M 0b001 |
12Mhz | |
#define | CLOCK_13M 0b010 |
13Mhz | |
#define | CLOCK_19_2M 0b011 |
19.2Mhz | |
#define | CLOCK_24M 0b101 |
24Mhz | |
#define | CLOCK_26M 0b110 |
26Mhz | |
#define | CLOCK_38_4M 0b111 |
38.4Mhz | |
#define | RDS_STANDARD 0 |
RDS Mode. | |
#define | RDS_VERBOSE 1 |
RDS Mode. | |
#define | RDA_FM_BAND_USA_EU 0 |
87.5–108 MHz (US / Europe, Default) | |
#define | RDA_FM_BAND_JAPAN_WIDE 1 |
76–91 MHz (Japan wide band) | |
#define | RDA_FM_BAND_WORLD 2 |
76–108 MHz (world wide) | |
#define | RDA_FM_BAND_SPECIAL 3 |
65 –76 MHz(East Europe) or 50 - 65MHz(see bit 9 of gegister 0x07) | |
#define | RDA_SEEK_WRAP 0 |
Wrap at the upper or lower band limit and continue seeking. | |
#define | RDA_SEEK_STOP 1 |
Stop seeking at the upper or lower band limit. | |
#define | RDA_SEEK_DOWN 0 |
Seek Down. | |
#define | RDA_SEEK_UP 1 |
Seek UP. | |
#define | REG00 0x00 |
Register 0x00. | |
#define | REG02 0x02 |
Register 0x02. | |
#define | REG03 0x03 |
Register 0x03. | |
#define | REG04 0x04 |
Register 0x04. | |
#define | REG05 0x05 |
Register 0x05. | |
#define | REG06 0x06 |
Register 0x06. | |
#define | REG07 0x07 |
Register 0x07. | |
#define | REG08 0x08 |
Register 0x08. | |
#define | REG0A 0x0A |
Register 0x0A. | |
#define | REG0B 0x0B |
Register 0x0B. | |
#define | REG0C 0x0C |
Register 0x0C. | |
#define | REG0D 0x0D |
Register 0x0D. | |
#define | REG0E 0x0E |
Register 0x0E. | |
#define | REG0F 0x0F |
Register 0x0F. | |
#define | SH_REG0A 0 |
Shadow array position for register 0x0A. | |
#define | SH_REG0B 1 |
Shadow array position for register 0x0B. | |
#define | SH_REG0C 2 |
Shadow array position for register 0x0C - RDS Block A. | |
#define | SH_REG0D 3 |
Shadow array position for register 0x0D - RDS Block B. | |
#define | SH_REG0E 4 |
Shadow array position for register 0x0E - RDS Block C. | |
#define | SH_REG0F 5 |
Shadow array position for register 0x0F - RDS Block D. | |
#define | I2S_WS_STEP_48 0b1000 |
#define | I2S_WS_STEP_44_1 0b0111 |
#define | I2S_WS_STEP_32 0b0110 |
#define | I2S_WS_STEP_24 0b0101 |
#define | I2S_WS_STEP_22_05 0b0100 |
#define | I2S_WS_STEP_16 0b0011 |
#define | I2S_WS_STEP_12 0b0010 |
#define | I2S_WS_STEP_11_025 0b0001 |
#define | I2S_WS_STEP_8 0b0000 |
#define CLOCK_12M 0b001 |
12Mhz
#define CLOCK_13M 0b010 |
13Mhz
#define CLOCK_19_2M 0b011 |
19.2Mhz
#define CLOCK_24M 0b101 |
24Mhz
#define CLOCK_26M 0b110 |
26Mhz
#define CLOCK_32K 0b000 |
32.768kHz
#define CLOCK_38_4M 0b111 |
38.4Mhz
#define I2C_ADDR_DIRECT_ACCESS 0x11 |
Can be used to access a given register at a time.
#define I2C_ADDR_FULL_ACCESS 0x10 |
Can be used to access a set of register at a time.
#define I2S_WS_STEP_11_025 0b0001 |
#define I2S_WS_STEP_12 0b0010 |
#define I2S_WS_STEP_16 0b0011 |
#define I2S_WS_STEP_22_05 0b0100 |
#define I2S_WS_STEP_24 0b0101 |
#define I2S_WS_STEP_32 0b0110 |
#define I2S_WS_STEP_44_1 0b0111 |
#define I2S_WS_STEP_48 0b1000 |
#define I2S_WS_STEP_8 0b0000 |
#define MAX_DELAY_AFTER_OSCILLATOR 100 |
#define OSCILLATOR_TYPE_ACTIVE 1 |
Reference clock (active crystal oscillator or signal generator)
#define OSCILLATOR_TYPE_CRYSTAL 0 |
Same OSCILLATOR_TYPE_PASSIVE (Legacy)
#define OSCILLATOR_TYPE_PASSIVE 0 |
Passive Crystal.
#define OSCILLATOR_TYPE_REFCLK 1 |
Same OSCILLATOR_TYPE_ACTIVE (Lagacy)
#define RDA_FM_BAND_JAPAN_WIDE 1 |
76–91 MHz (Japan wide band)
#define RDA_FM_BAND_SPECIAL 3 |
65 –76 MHz(East Europe) or 50 - 65MHz(see bit 9 of gegister 0x07)
#define RDA_FM_BAND_USA_EU 0 |
87.5–108 MHz (US / Europe, Default)
#define RDA_FM_BAND_WORLD 2 |
76–108 MHz (world wide)
#define RDA_SEEK_DOWN 0 |
Seek Down.
#define RDA_SEEK_STOP 1 |
Stop seeking at the upper or lower band limit.
#define RDA_SEEK_UP 1 |
Seek UP.
#define RDA_SEEK_WRAP 0 |
Wrap at the upper or lower band limit and continue seeking.
#define RDS_STANDARD 0 |
RDS Mode.
#define RDS_VERBOSE 1 |
RDS Mode.
#define REG00 0x00 |
Register 0x00.
#define REG02 0x02 |
Register 0x02.
#define REG03 0x03 |
Register 0x03.
#define REG04 0x04 |
Register 0x04.
#define REG05 0x05 |
Register 0x05.
#define REG06 0x06 |
Register 0x06.
#define REG07 0x07 |
Register 0x07.
#define REG08 0x08 |
Register 0x08.
#define REG0A 0x0A |
Register 0x0A.
#define REG0B 0x0B |
Register 0x0B.
#define REG0C 0x0C |
Register 0x0C.
#define REG0D 0x0D |
Register 0x0D.
#define REG0E 0x0E |
Register 0x0E.
#define REG0F 0x0F |
Register 0x0F.
#define RLCK_NO_CALIBRATE_MODE_OFF 0 |
#define RLCK_NO_CALIBRATE_MODE_ON 1 |
#define SH_REG0A 0 |
Shadow array position for register 0x0A.
#define SH_REG0B 1 |
Shadow array position for register 0x0B.
#define SH_REG0C 2 |
Shadow array position for register 0x0C - RDS Block A.
#define SH_REG0D 3 |
Shadow array position for register 0x0D - RDS Block B.
#define SH_REG0E 4 |
Shadow array position for register 0x0E - RDS Block C.
#define SH_REG0F 5 |
Shadow array position for register 0x0F - RDS Block D.