/Users/rcaratti/Desenvolvimento/eu/Arduino/PU2CLR_MCP23008/pu2clr_mcp23008.h File Reference

#include <Arduino.h>
#include <Wire.h>

Go to the source code of this file.

Data Structures
union	mcp23008_ioncon
	IOCON register structure - I/O EXPANDER CONFIGURATION REGISTER (ADDR 0x05) More...
class	MCP
struct	mcp23008_ioncon.arg

Macros
#define	REG_IODIR   0x00
	Controls the direction of the data I/O. When a bit is set, the corresponding pin becomes an input. When a bit is clear, the corresponding pin becomes an output. More...
#define	REG_IPOL   0x01
	The IPOL register allows the user to configure the polarity on the corresponding GPIO port bits. More...
#define	REG_GPINTEN   0x02
	The GPINTEN register controls the interrupt-on-change feature for each pin. More...
#define	REG_DEFVAL   0x03
	The default comparison value is configured in the DEFVAL register. More...
#define	REG_INTCON   0x04
	The INTCON register controls how the associated pin value is compared for the interrupt-on-change feature. More...
#define	REG_IOCON   0x05
	The IOCON register contains several bits for configuring the device. See method: setIoCon. More...
#define	REG_GPPU   0x06
	The GPPU register controls the pull-up resistors for the port pins. More...
#define	REG_INTF   0x07
	The INTF register reflects the interrupt condition on the port pins of any pin that is enabled for interrupts via the GPINTEN register. More...
#define	REG_INTCAP   0x08
	The INTCAP register captures the GPIO port value at the time the interrupt occurred. More...
#define	REG_GPIO   0x09
	The GPIO register reflects the value on the port. More...
#define	REG_OLAT   0x0A
	The OLAT register provides access to the output latches. More...
#define	GPIO_INPUT   0xFF
#define	GPIO_OUTPUT   0x00
#define	INTERRUPT_ODR_OPEN_DRAIN   1
	Open-drain output (overrides the INTPOL bit). More...
#define	INTERRUPT_ODR_ACTIVE_DRIVE   0
	Active driver output (INTPOL bit sets the polarity). More...
#define	INTERRUPT_INTPOL_ACTIVE_HIGH   1
	Active high - polarity of the INT output pin. More...
#define	INTERRUPT_INTPOL_ACTIVE_LOW   0
	Active low - polarity of the INT output pin. More...
#define	MCP_GPIO0   0
#define	MCP_GPIO1   1
#define	MCP_GPIO2   2
#define	MCP_GPIO3   3
#define	MCP_GPIO4   4
#define	MCP_GPIO5   5
#define	MCP_GPIO6   6
#define	MCP_GPIO7   7
#define	CHECK_BIT_HIGH(x, y)   ( x & (1 << y) )
	Check if a bit is high. Returns 0 or != 0. More...

---

Data Structure Documentation

mcp23008_ioncon

union mcp23008_ioncon

IOCON register structure - I/O EXPANDER CONFIGURATION REGISTER (ADDR 0x05)

The IOCON register contains several bits for configuring the device.

Data Fields
struct mcp23008_ioncon	arg
uint8_t	raw

mcp23008_ioncon.arg

struct mcp23008_ioncon.arg

Data Fields
uint8_t	DUMMY1: 1	Unimplemented.
uint8_t	INTPOL: 1	This bit sets the polarity of the INT output pin. 1= Active-high. 0 = Active - low.
uint8_t	ODR: 1	This bit configures the INT pin as an open-drain output. 1 = Open-drain. 0 = Active driver.
uint8_t	HAEN: 1	Hardware Address Enable bit (MCP23S08 only). 1 = Enables.
uint8_t	DISSLW: 1	Slew Rate control bit for SDA output. 1= Slewratedisabled. 0= Slewrateenabled.
uint8_t	SEQOP: 1	Sequential Operation mode bit. 1 = Sequential operation disabled, address pointer does not increment.
uint8_t	DUMMY2: 2	Unimplemented.

Macro Definition Documentation

REG_IODIR

#define REG_IODIR   0x00

Controls the direction of the data I/O. When a bit is set, the corresponding pin becomes an input. When a bit is clear, the corresponding pin becomes an output.

REG_IPOL

#define REG_IPOL   0x01

The IPOL register allows the user to configure the polarity on the corresponding GPIO port bits.

REG_GPINTEN

#define REG_GPINTEN   0x02

The GPINTEN register controls the interrupt-on-change feature for each pin.

REG_DEFVAL

#define REG_DEFVAL   0x03

The default comparison value is configured in the DEFVAL register.

REG_INTCON

#define REG_INTCON   0x04

The INTCON register controls how the associated pin value is compared for the interrupt-on-change feature.

REG_IOCON

#define REG_IOCON   0x05

The IOCON register contains several bits for configuring the device. See method: setIoCon.

REG_GPPU

#define REG_GPPU   0x06

The GPPU register controls the pull-up resistors for the port pins.

REG_INTF

#define REG_INTF   0x07

The INTF register reflects the interrupt condition on the port pins of any pin that is enabled for interrupts via the GPINTEN register.

REG_INTCAP

#define REG_INTCAP   0x08

The INTCAP register captures the GPIO port value at the time the interrupt occurred.

REG_GPIO

#define REG_GPIO   0x09

The GPIO register reflects the value on the port.

REG_OLAT

#define REG_OLAT   0x0A

The OLAT register provides access to the output latches.

GPIO_INPUT

#define GPIO_INPUT   0xFF

GPIO_OUTPUT

#define GPIO_OUTPUT   0x00

INTERRUPT_ODR_OPEN_DRAIN

#define INTERRUPT_ODR_OPEN_DRAIN   1

Open-drain output (overrides the INTPOL bit).

INTERRUPT_ODR_ACTIVE_DRIVE

#define INTERRUPT_ODR_ACTIVE_DRIVE   0

Active driver output (INTPOL bit sets the polarity).

INTERRUPT_INTPOL_ACTIVE_HIGH

#define INTERRUPT_INTPOL_ACTIVE_HIGH   1

Active high - polarity of the INT output pin.

INTERRUPT_INTPOL_ACTIVE_LOW

#define INTERRUPT_INTPOL_ACTIVE_LOW   0

Active low - polarity of the INT output pin.

MCP_GPIO0

#define MCP_GPIO0   0

MCP_GPIO1

#define MCP_GPIO1   1

MCP_GPIO2

#define MCP_GPIO2   2

MCP_GPIO3

#define MCP_GPIO3   3

MCP_GPIO4

#define MCP_GPIO4   4

MCP_GPIO5

#define MCP_GPIO5   5

MCP_GPIO6

#define MCP_GPIO6   6

MCP_GPIO7

#define MCP_GPIO7   7

CHECK_BIT_HIGH

#define CHECK_BIT_HIGH	(		x,
			y
	)		( x & (1 << y) )

Check if a bit is high. Returns 0 or != 0.